Sunplus Shrinks DVD Chip Size, Design Time and Cost with Cadence Encounter RTL Compiler; Patented Cadence Synthesis Technology Enables Smaller Die Size and Faster Time to Market for Consumer Electronics Chip
SAN JOSE, Calif.—(BUSINESS WIRE)—July 31, 2005—
Cadence Design Systems, Inc. (NYSE:CDN) (Nasdaq:CDN)
today announced that Sunplus Technology Company, Ltd. of Taiwan has
achieved an important production tapeout of a reduced die-size
consumer-electronics chip using Cadence technology. Using Cadence(R)
Encounter(R) RTL Compiler global synthesis, Sunplus completed the DVD
chip in just one month. Encounter RTL Compiler, part of the Encounter
digital IC design platform, enabled Sunplus to shrink the die size of
the 2-million-gate design to meet the area constraint for the whole
chip while also speeding the physical implementation process.
According to Sunplus, Encounter RTL Compiler created a small
enough design that engineers could meet their die size requirement
with margin to spare. This extra margin helped speed physical
implementation and reduce the project schedule to one month. As a
result, Sunplus was able to cut its project costs for this high-volume
DVD chip and get it to market more quickly.
"Sunplus participates in the highly competitive consumer
electronics market. We are always looking for a competitive edge,"
said Chih-Hao Kung, VP of research and development at Sunplus. "We
found that Encounter RTL Compiler gave us both cost and time-to-market
advantages that measurably impact our bottom line."
Encounter RTL Compiler has proven through tapeouts to deliver
improved performance, smaller die sizes, lower power consumption, and
faster design closure through place and route. Cadence defines this
metric as quality of silicon (QoS). This ability to produce smaller,
faster and cooler chips in less time has increased customer
competitiveness and reduced overall costs.
"This successful Encounter RTL Compiler tapeout at Sunplus is
another example of how Cadence's patented global synthesis technology
can help increase customer success in a highly competitive market
space," said Dr. Chi-Ping Hsu, corporate vice president at Cadence.
"Encounter RTL Compiler is now being successfully used in production
by companies worldwide to create smaller, faster, and lower power
designs in a very short time."
Encounter RTL Compiler has been used in production by more than
100 customers worldwide for competitive markets in consumer,
communications, computer, networking, graphics, and SoC designs.
About Cadence
Cadence enables global electronic-design innovation and plays an
essential role in the creation of today's integrated circuits and
electronics. Customers use Cadence software and hardware,
methodologies, and services to design and verify advanced
semiconductors, consumer electronics, networking and
telecommunications equipment, and computer systems. Cadence reported
2004 revenues of approximately $1.2 billion, and has approximately
5,000 employees. The company is headquartered in San Jose, Calif.,
with sales offices, design centers, and research facilities around the
world to serve the global electronics industry. More information about
the company, its products, and services is available at
www.cadence.com.
Cadence, the Cadence logo and Encounter are registered trademarks
of Cadence Design Systems, Inc. All other trademarks are the property
of their respective owners.
Contact:
Cadence Design Systems, Inc.
Michael Fournell, 408-428-5135
Email Contact
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